Field of the Invention
The present invention relates to a lateral PNP transistor having a characteristic latch voltage that of an NPN transistor. More particularly, the invention is directed to a transistor in which an n.sup.+ diffusion layer is formed within an emitter diffusion layer (or a collector diffusion layer) to improve the electrostatic withstand-stress of the transistor by discharging a static electricity when the static electricity is applied to a base of the lateral PNP transistor.